Whitney Knitter June 5, 2022 DSP for FPGA: Custom AXI4-Stream FIR filter IP in Vivado Whitney Knitter June 5, 2022
Whitney Knitter April 1, 2021 DSP for FPGA: Using Xilinx DDS with Custom FIR Whitney Knitter April 1, 2021
Whitney Knitter March 11, 2021 DSP for FPGA: Rewriting FIR Logic to Meet Timing Whitney Knitter March 11, 2021
